SAP-1

8-Bit Breadboard Computer— a browser simulation of the classic from-scratch TTL computer, built from real registers, an ALU, and microcode

+5VGND
BUS
$00
PROGRAMCOUNTER
0
CO CE J
MEMORY ADDRESS+ MEMORY CONTENTS
0
0
RUNPGM
MI RO RI
INSTRUCTION REGISTER
NOP
0
II IO
'A' REGISTER
0
AI AO
'B' REGISTER
0
BI
FLAGS REGISTER
FI
SUM REGISTERA + B
0
ΣO SU
CONTROL WORD16-bit microcode output — one 220Ω resistor per signal
RING COUNTERT-state
CLOCK MODULE3×555 (astable/monostable/bistable) + mode logic — same module as the 6502 build
1 Hz
OUTPUT REGISTER7-segment decimal display
OI
HALT
+5VGND

Microcode Programmer Software

Write a program for the 11-instruction ISA below (one instruction or data byte per line, 16 bytes total), then assemble and load it.

1
Ready. Write a program and click "Assemble & Load".

        
NOP            no operation
LDA addr       A = RAM[addr]
ADD addr       A = A + RAM[addr]  (sets flags)
SUB addr       A = A - RAM[addr]  (sets flags)
STA addr       RAM[addr] = A
LDI value      A = value (immediate, 0-15)
JMP addr       PC = addr
JC  addr       PC = addr, only if the carry flag is set
JZ  addr       PC = addr, only if the zero flag is set
OUT            output register = A
HLT            halt the clock

addr/value are 0-15 (this machine has 16 bytes of RAM total).
Flags are only updated by ADD/SUB — not by LDA/LDI — matching the
real hardware, so JC/JZ only make sense right after an ADD or SUB.

      

    


    

      
Microstep Activity

      


      
RAM Viewer